HDLBits答案汇总

前言

该博客为本人做HDLBits习题时的心得记录总结，欢迎大家一起交流进步。

HDLBits网站链接

Verilog Language

Basics

Vectors

Modules:Hierarchy

Procedures

More Verilog Features

Circuits

Combinational Logic

Basic gates

Multiplexers

Arithmetic Circuits

Karnaugh Map to Circuit

Sequential Logic

Latches and Flip-Flops

Counters

Shift Registers

More Circuits

Finite State Machines

Simple FSM 1—Simple state transitions 3

Simple one-hot state transitions 3—Design a Moore FSM

Lemmings 1-4

One-hot FSM—PS/2 packet parser and datapath

Serial receiver—Serial receiver with parity checking

Q8—Q5b

Q3a—Q6

Q2a—Q2b

Building Larger Circuits

Verification:Reading Simulations

Finding bugs in code

Build a circuit from a simulation waveform

Verification:Writing Testbenches